Microchip Technology /ATSAME53J19A /SysTick /CSR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as CSR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (VALUE_0)ENABLE 0 (VALUE_0)TICKINT 0 (VALUE_0)CLKSOURCE 0 (COUNTFLAG)COUNTFLAG

CLKSOURCE=VALUE_0, TICKINT=VALUE_0, ENABLE=VALUE_0

Description

SysTick Control and Status Register

Fields

ENABLE

SysTick Counter Enable

0 (VALUE_0): Counter disabled

1 (VALUE_1): Counter enabled

TICKINT

SysTick Exception Request Enable

0 (VALUE_0): Counting down to 0 does not assert the SysTick exception request

1 (VALUE_1): Counting down to 0 asserts the SysTick exception request

CLKSOURCE

Clock Source 0=external, 1=processor

0 (VALUE_0): External clock

1 (VALUE_1): Processor clock

COUNTFLAG

Timer counted to 0 since last read of register

Links

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